The International Symposium on System Synthesis (ISSS) is a major
international forum presenting emerging techniques for the system-level
design and synthesis of computing systems. Having begun as the International
Workshop on High-Level Synthesis in the mid-80's, it attracts leading design
automation professionals from around the world.
ISSS 2001 is the 14th in this very successful series of symposia. In
addition to regular presentations, the Symposium will include invited talks
by leading industrial and academic experts. To encourage discussion among
the Symposium participants, each technical session will consist of oral
presentations followed by a poster session where the authors of presented
papers will answer any further questions and provide additional details of
their works. Proceedings of the Symposium will be published.
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I M P O R T A N T D A T E S
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Submission Deadline : March 30, 2001
Notification of Acceptance : May 25, 2001
Camera-ready copies : June 22, 2001
Topics of interest
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Original papers on, but not limited to, the following topics are invited:
1. System-Level Synthesis: Partitioning, design reuse, core/IP-based design,
quality measures, estimation, specification languages and models,
intermediate forms, embedded processor synthesis.
2. Hardware-Software Co-Design: Hardware/software tradeoffs, interfaces and
communications, co-simulation, co-emulation and co-synthesis, embedded
system architectures, system exploration, system testbench development,
design automation for rapid system prototyping.
3. Programmable (Multi-) Processor-Based Design and Synthesis: ASIPs,
reconfigurable computing, code generation, instruction-set specification,
design and simulation, high-level code transformations.
4. System Design Experience and Methodologies: Application-specific parallel
distributed systems, industrial telecom, robotics, vision, video, audio
and speech processing systems, formalized design methodology, process
management.
5. Embedded and Real-Time System Software: Software development, constraint
specification, process scheduling, real-time operating systems.
6. High-Level and Architectural Synthesis: Datapath, control, memory, and
interface synthesis from behavioral specifications, clocking/timing
optimization, physical design models for high-level tradeoffs, hardware
accelerators/coprocessors.
7. Co-design of Distributed and Multiprocessor Architectures:
hardware/software
interfaces co-design, prototyping approaches, memory co-design aspects.
8. Synthesis for Low Power, Testability and Verifiability in the above
areas.
Submitted papers should be 6 pages or less in IEEE 2-column style (10pt), as
close as possible to the final content. They should clearly specify
contributions and results. They will be reviewed anonymously. Papers
exceeding the page limit will be returned to the authors. Previously
published work or submissions simultaneously sent to other forums will
not be considered. Manuscripts must be submitted electronically.
For details on the topics of interest, submission procedure, as well as,
additional information about the Symposium and this year's venue, please
consult the Symposium web page: http://www.isss-symposium.com . Other
correspondence may be addressed to the Program Chair at the following
address:
El Mostapha Aboulhamid, Program Chair ISSS 2001
DIRO, #3251, 2920 Ch. de la Tour
Universit